Electronic design automation (EDA) and hardware descriptive languages (HDL) are reshaping the integrated circuit (IC) industry. An HDL is a computer-based language having special constructs and semantics to model, represent and simulate the functional behavior and timing of digital hardware. HDLs provide an alternative to traditional schematic based design styles, where designers focused on transistor and gate level abstractions. HDLs enable designers to focus on the relationships between input and output signals, not on the circuit detail supporting the physical/structural implementation. EDA provides the synthesis tools needed to automatically create a schematic from an HDL behavioral description. This description can then be mapped into hardware technology, such as an FPGA, to meet timing and area constraints.
The objective of my senior project was to demonstrate proficiency in Verilog HDL and electronic design automation by programming the Gnome microprocessor. Additionally, the design was implemented on a Xilinx field programmable gate array (FPGA).
I used the Xilinx Foundation Express Student Edition, Version 1.5 software package, Verilog HDL, and the library of circuits Xilinx provided to code and synthesize the Gnome microprocessor. I designed a schematic using macros created from my synthesized Verilog code and tools provided by the Xilinx software. A multiplication program stored in ROM was used for simulation testing and waveform analysis. Once correct outputs were produced from the simulations, the schematic was implemented to produce a bitstream. The bitstream was FTP(ed) to my Computer Science account and moved to a Sun where it was downloaded to the XC4010E PC84 FPGA.
Additionally, I modified a two-pass assembler to create a label table and produce machine code for the instruction set. The assembler was used to translate the binary multiplication program stored in the ROM.
Advisor: Dr. Wayne Lang